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YABUS.ZXISA

This project connect ISA card as 8bit I/O device. So cards with own memory cannot be used. The main purpose is to use cheap Multi I/O cards - serial interface, parallel interface and FDC controller.

The ZX Spectrum must have a possiblity to lock all inernal ports range #40..#7F (with /IORQGE line). External interfaces that use ports in this range, should be connected behind YABUS.ZXISA and provide high state on the through /IORQGE line to disable ISA slots for all ports used by them (e.g. #5B, #5F, #7B, #7F).

YABUS.ZXISA is a step towards YABUS.ZXAT - a bridge that will join ZX Spectrum with PC AT motherboard.

Port map

Serial interface / modem - the 8 ports are seen in addresses #50..#57 of Z80. The high byte of port address is used to select device (usually 0..3).

Parallel interface (sorry, only SPP) - the 3 ports are seen in addresses #58..#5A of Z80. High byte of port address selects device (usually 0..1).

Floppy disk controller (FDC) - the 4 ports are mapped to addresses #72, #74, #75, #77 of Z80. High byte of port address is ignored.

Sound card - ports of are mapped as follows:

  • Control port (370h..371h) - #78..#79, high byte ignored.
  • Sound Blaster (220h..23Fh) - #0148..#074F.
  • MIDI (330h..331h) - #0448..#0449 or (300h..301h) - #0668..#0669.
  • AD-LIB (388h..38Bh) - #0260..#0263.
  • Joystick (201h) - #0769.

    Interrupts

    The cards can generate INT interrupts in IM1 and IM2. In IM2 a vector range #02..#7E is generated.

    BitDescription
    7always 0
    6state on IRQ9 line
    5state on IRQ7 line (LPT1)
    4state on IRQ6 line (FDC)
    3state on IRQ5 line (LPT2)
    2state on IRQ4 line (COM1)
    1state on IRQ3 line (COM2)
    0always 0

    So, if only one in interrupt is active at a time, following basic vectors in IM2 table are generated:

    LineBasic vectorAll possible vectors
    IRQ3+#02 #02, #06, #0A, #0E, #12, #16, #1A, #1E,
    #22, #26, #2A, #2E, #32, #36, #3A, #3E,
    #62, #66, #6A, #6E, #72, #76, #7A, #7E,
    #62, #66, #6A, #6E, #72, #76, #7A, #7E
    IRQ4+#04 #04, #06, #0C, #0E, #14, #16, #1C, #5E,
    #24, #26, #2C, #2E, #34, #36, #3C, #3E,
    #44, #46, #4C, #4E, #54, #56, #5C, #5E,
    #64, #66, #6C, #6E, #74, #76, #7C, #7E
    IRQ5+#08 #08, #0A, #0C, #0E, #18, #1A, #1C, #1E,
    #28, #2A, #2C, #2E, #38, #3A, #3C, #3E,
    #48, #4A, #4C, #4E, #58, #5A, #5C, #5E,
    #68, #6A, #6C, #6E, #78, #7A, #7C, #7E
    IRQ6+#10 #10, #12, #14, #16, #18, #1A, #1C, #1E,
    #30, #32, #34, #36, #38, #3A, #3C, #3E,
    #50, #52, #54, #56, #58, #5A, #5C, #5E,
    #60, #72, #74, #76, #78, #7A, #7C, #7E
    IRQ7+#20 #20, #22, #24, #26, #28, #2A, #2C, #2E,
    #30, #32, #34, #36, #38, #3A, #3C, #3E,
    #60, #62, #64, #66, #68, #6A, #6C, #6E,
    #70, #72, #74, #76, #78, #7A, #7C, #7E
    IRQ9+#40 #40, #42, #44, #46, #48, #4A, #4C, #4E,
    #50, #52, #54, #56, #58, #5A, #5C, #5E,
    #60, #62, #64, #66, #68, #6A, #6C, #6E,
    #70, #72, #74, #76, #78, #7A, #7C, #7E

    The interrupt entry +#00 is never used. So you should fill the +#00..+#01 bytes with the same value, as in normal "safe" IM2 table. Of course bytes +#80..+#100 should be also filled with the same value. (At the address got from the filling value, for example #BFBF for #BF value, should be service code for frame interrupts.)

    You can set interrupts prioritetes by filling the vector entry calculated as a sum. For example, if IRQ3 and IRQ4 will be active in the same time, the generated vector is +#06. If you want to give higher priority to IRQ3, place at +#06 the same address as in +#02. If the IRQ4 has to be serviced first, enter the same value as in +#04. The code must enable interrupts when finished.

    For every interrupt source (IRQ3..IRQ7, IRQ9) the service address must be entered in 32 entries of IM2 table!

    How it works?

    The address is generated for ISA slot as follows:

    ISA lineZ80 line or state
    A4=0 or A5=0A4=1 and A5=1
    IA9always high (1)
    IA8/A8high (1)
    IA7/A3
    IA6A4
    IA5/A5high (1)
    IA4/A9high (1)
    IA3/A10low (0)
    IA2A2
    IA1A1
    IA0A0

    Printed circuit board

    The board is dedicated for Split interface. Has two sides with holes metalization. Four logic chips (74LS00, 74LS139, 74LS158, 74LS244) are mounted at bottom side, while two ISA-8 slots at top side.

    YABUS.ZXISA8 board - top view


    Tell other people:

    Files for download

    zxisa005.zip 66.4kB (2006-04-03 22:46)
    Board design put into production. Eagle and Tango PCB data files.
    zxisa.txt 5.8kB (2006-03-31 13:12)
    [en] Interface technical description.
    modem.zip 10.9kB (1999-07-06 17:04)
    [pl] Description how to connect ISA serial interface or 8250 UART to ZX Spectrum.

    Links to other pages



    See also

    ZX.SPLIT : Sinclair bus splitter
    You can build bus splitters and through interfaces with this.
    YAMOD.FDC765A
    The FDC interface, compatibile to ZX Spectrum +3 or YABUS.ZXISA.
    DSKHNDLR
    Low level floppy and hard disk drivers for Z80.

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    © 2009-12-28 21:50 Jarek Adamski, http://8bit.yarek.pl