This was my first idea of YABUS interface for ZX Spectrum.
Never build. The children of this project are YABUS.ZX
(without memory) and idea for 4MB RAM switching.
The interface was designed with 3 through edge slots (Z2 -
not buffered; Z3, Z4 - address lines partly buffered) and 3
YABUS slots with buffered data and partly address lines. Z2
was close to Z1 (the ZX Spectrum connection) and isn't shown
The memory of YABUS.ZXMEM was 32kB EPROM and 32kB SRAM.
The 16kB ROM area of ZX Spectrum was divided into 4 windows
of 4kB each. Each window was controlled by one of #F0..#F3
ports, respectively. Bits 0..4 are dedicated to select the
4kB page (3 and 4 not used in v006 design - the interface
is upgradable to 128kB EPROM and 128kB SRAM). Bits 5..7
work as follows:
|bit 7||bit 6||bit 5||Description|
|0||0||0||Not used (memory disabled).|
|0||0||1||Memory from interface in Z2.|
|0||1||0||Memory from interface in Z3.|
|0||1||1||Memory from interface in Z4.|
|1||0||1||SRAM, write protected.|
|1||1||0||ROM of ZX Spectrum (Z1).|
After a reset, the page #FF is selected, what means last 4kB
of EPROM. The code in this page must test hardware in Z2..Z4
slots and set memory configuration. A boot menu can be
displayed when several options are possible (for example the
Z2 can have MB-02, Z3 - +D, Z4 - Timex Interface M-397).
All plugged YAMODs and all I/O ports of Z1..Z4 are available
Files for download
- schem006.gif 17.0kB (2002-02-16 21:34)
- Recent schematics.
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